Method for manufacturing a low-profile semiconductor device

ABSTRACT

A method for manufacturing a semiconductor device includes the steps of forming a first conductive bump on a substrate, forming a second conductive bump on a semiconductor chip, forming a plurality of spaced apart dielectric supporting pads on one of the substrate and the semiconductor chip, mounting the semiconductor chip on the substrate to confine therebetween a gap, bonding together the first and second conductive bumps, and forming an insulating layer that fills in the gap and that encapsulates the supporting pads and the first and second conductive bumps.

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority of Taiwan patent Application No.90101277, filed on Jan. 19, 2001.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This invention relates to a method for manufacturing alow-profile semiconductor device.

[0004] 2. Description of the Related Art

[0005] The sizes of semiconductor chips can vary widely with differentchip packaging techniques. With the rapid advancement in electronicdevices, minimization of profiles of semiconductor chips has been amajor concern of manufactures. For instance, the profiles of Flip-Chipscan be made relatively low by current packaging techniques. However,there is still a need to further reduce the profiles of the Flip-Chips.

SUMMARY OF THE INVENTION

[0006] Therefore, the main object of the present invention is to providea method for manufacturing a low-profile semiconductor device.

[0007] Another object of the present invention is to provide alow-profile semiconductor device.

[0008] Yet another object of the present invention is to provide amethod for forming a conductive bump on a bonding pad on a pad-mountingsurface of a semiconductor chip so as to reduce the profile of asemiconductor device that includes the semiconductor chip.

[0009] Still another object of the present invention is to provide asemiconductor device with a conductive bump that can lead to a reducedprofile for the semiconductor device.

[0010] According to one aspect of the present invention, there isprovided a method for manufacturing a semiconductor device that includesa semiconductor chip and a substrate. The substrate has a chip-mountingsurface provided with a plurality of contact pads. The semiconductorchip has a pad-mounting surface provided with a plurality of bondingpads which are to be connected to corresponding ones of the contactpads. The method comprises the steps of: forming a first conductive bumpon each of the contact pads of the substrate; forming a secondconductive bump on each of the bonding pads of the semiconductor chip;forming a plurality of spaced apart dielectric supporting pads on aselected one of the chip-mounting surface of the substrate and thepad-mounting surface of the semiconductor chip at positions offset fromthe first and second conductive bumps; mounting the semiconductor chipon the substrate to confine therebetween a gap and to permit each of thefirst conductive bumps to be vertically registered with and to contact arespective one of the second conductive bumps and to permit thesupporting pads to interconnect the chip-mounting surface and thepad-mounting surface; reflowing the first and second conductive bumps ina manner that each of the first conductive bumps is bonded to therespective one of the second conductive bumps; and forming an insulatinglayer that fills in the gap and that encapsulates the supporting padsand the first and second conductive bumps.

[0011] According to another aspect of the present invention, asemiconductor device comprises: a substrate having a chip-mountingsurface provided with a plurality of contact pads and a plurality offirst conductive bumps formed respectively on the contact pads; asemiconductor chip having a pad-mounting surface provided with aplurality of bonding pads and a plurality of second conductive bumpsformed respectively on the bonding pads, the semiconductor chip beingmounted on the substrate to confine therebetween a gap, the secondconductive bumps being respectively registered with and being bonded tothe first conductive bumps; a plurality of spaced apart dielectricsupporting pads disposed in the gap at positions offset from the firstand second bumps, the supporting pads interconnecting the chip-mountingsurface of the substrate and the pad-mounting surface of thesemiconductor chip; and an insulating layer that fills in the gap andthat encapsulates the supporting pads and the first and secondconductive bumps.

[0012] According to yet another aspect of the present invention, thereis provided a method for forming a conductive bump on a bonding pad on apad-mounting surface of a semiconductor chip. The method comprises thesteps of: applying an adhesive layer to a central area of the bondingpad; laying a ball body on the adhesive layer, the ball body having alower half with a lower hemisphere surface that curves upwardly from anupper surface of the adhesive layer and that cooperates with the uppersurface of the adhesive layer to define a groove therebetween; andforming a conductive layer that fills the groove, that encapsulates andthat is bonded to the ball body and the adhesive layer, and that coversa remaining area of the bonding pad around the central area.

[0013] According to a further aspect of the present invention, asemiconductor device comprises: a semiconductor chip having apad-mounting surface provided with at least a bonding pad; and aconductive bump formed on the bonding pad and having an adhesive layerthat covers a central area of the bonding pad, a ball body that is laidon and that is bonded to the adhesive layer, and a conductive layer thatencapsulates and that is bonded to the ball body and the adhesive layerand that covers a remaining area of the bonding pad around the centralarea, the ball body having a lower half with a lower hemisphere surfacethat curves upwardly from an upper surface of the adhesive layer andthat cooperates with the upper surface of the adhesive layer to define agroove therebetween, the conductive layer filling the groove.

BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In drawings which illustrate embodiments of the invention,

[0015]FIG. 1 is a schematic view illustrating the formation of a firstconductive bump on a bonding pad on a pad-mounting surface of asemiconductor chip according to a method of this invention;

[0016]FIG. 2 is a schematic view illustrating the formation of a secondconductive bump on a contact pad on a chip-mounting surface of asubstrate according to the method of this invention;

[0017]FIG. 3 is a schematic view illustrating the formation ofsupporting pads on the chip-mounting surface of the substrate accordingto the method of this invention;

[0018]FIG. 4 is a fragmentary perspective view to illustratedistribution of the supporting pads of FIG. 3 on the substrate;

[0019]FIG. 5 is a schematic view illustrating the step of mounting thesemiconductor chip of FIG. 2 on the substrate of FIG. 3 according to themethod of this invention;

[0020]FIG. 6 is a schematic view illustrating formation of an insulatinglayer between the semiconductor chip of FIG. 2 and the substrate of FIG.3 according to the method of this invention;

[0021]FIG. 7 is a schematic view to illustrate the supporting padsmodified from those of FIG. 4; and

[0022]FIG. 8 is a schematic view to illustrate a modified semiconductorchip of the semiconductor device of this invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] FIGS. 1 to 6 illustrate consecutive steps of processing asemiconductor chip 1 and a substrate 2 for forming a preferredembodiment of a semiconductor device according to the method of thisinvention.

[0024] Referring to FIGS. 1 and 2, the substrate 2 has a chip-mountingsurface 20 provided with a plurality of contact pads 21 (only onecontact pad is shown) The semiconductor chip 1 has a pad-mountingsurface 10 provided with a plurality of bonding pads 11 (only onebonding pad is shown) which are to be connected to corresponding ones ofthe contact pads 21 on the substrate 2.

[0025] In FIG. 2, a first conductive bump 22 is formed on each of thecontact pads 21 of the substrate 2 by printing techniques. The firstconductive bump 22 can be a silver-containing conductive paste. Thesubstrate 2 is preferably selected from a group consisting ofnon-flexible circuit boards, flexible circuit boards, circuit boardsmade from glass materials, and circuit boards made from plasticmaterials.

[0026] In FIG. 1, a second conductive bump 12 is formed on each of thebonding pads 11 of the semiconductor chip 1 by wire bonding techniquesor plating techniques.

[0027] In FIGS. 3 and 4, a plurality of spaced apart dielectricsupporting pads 3 are formed on the chip-mounting surface 20 of thesubstrate 2 at positions offset from the first conductive bumps 22. Inan alternative way, the supporting pads 3 can be formed on thepad-mounting surface 10 of the semiconductor chip 1 at positions offsetfrom the second conductive bumps 12. The supporting pads 3 havesubstantially the same length. The supporting pads 3 are made from afirst resin material.

[0028] In FIG. 5, the semiconductor chip 1 is mounted on the substrate 2to confine therebetween a gap 5 and to permit each of the firstconductive bumps 22 to be vertically registered with and to contact arespective one of the second conductive bumps 12 and to permit thesupporting pads 3 to interconnect the chip-mounting surface 20 and thepad-mounting surface

[0029] The first and second conductive bumps 22, 12 are reflowed in amanner that each of the first conductive bumps 22 is bonded to therespective one of the second conductive bumps 12.

[0030] In FIG. 6, an insulating layer 4 is formed and fills in the gap5, and encapsulates the supporting pads 3 and the first and secondconductive bumps 22, 12. The insulating layer 4 is made from a secondresin material.

[0031] Preferably, the first and second resin materials are epoxyresins. The method of this invention further includes a step of curingand hardening the supporting pads 3 and the insulating layer 4 in thegap 5 between the semiconductor chip 1 and the substrate 2.

[0032] As illustrated in FIG. 7, the supporting pads 3 can be in theform of strips as compared to the block shape of those of FIG. 4.

[0033]FIG. 8 illustrates a modified semiconductor chip 1 with acomposite conductive bump 12′ that can be applied to the method of thisinvention.

[0034] The method for forming the composite conductive bump 12′ includesthe steps of: applying an adhesive layer 122 to a central area of thebonding pad 11 on the pad-mounting surface 10 of the semiconductor chip1; laying a ball body 120 on the adhesive layer 122, the ball body 120having a lower half with a lower hemisphere surface 123 that curvesupwardly from an upper surface of the adhesive layer 122 and thatcooperates with the upper surface of the adhesive layer 122 to define agroove 124 therebetween; and forming a conductive layer 121 that fillsthe groove 124, that encapsulates and that is bonded to the ball body120 and the adhesive layer 122, and that covers a remaining area of thebonding pad 11 around the central area. The ball body 120 and theadhesive 122 can be formed from a conductive material or anon-conductive material. The conductive layer 121 can contain a metalselected from a group consisting of Au, Ag, and Sn. The conductive layer121 is preferably formed by sputtering techniques.

[0035] The use of the semiconductor chip 1 of FIG. 8 is advantageous inthat the height (h) of the composite conductive bump 12′ can be reducedto less than 75 μm and that the processing time for the formation of thecomposite conductive bump 12′ can be reduced to about one hour ascompared to those of the prior art that normally require about 20 hoursto form the conductive bumps.

[0036] With the invention thus explained, it is apparent that variousmodifications and variations can be made without departing from thespirit of the present invention. It is therefore intended that theinvention be limited only as recited in the appended claims.

We claim:
 1. A method for manufacturing a semiconductor device thatincludes a semiconductor chip and a substrate, the substrate having achip-mounting surface provided with a plurality of contact pads, thesemiconductor chip having a pad-mounting surface provided with aplurality of bonding pads, which are to be connected to correspondingones of the contact pads, said method comprising the steps of: forming afirst conductive bump on each of the contact pads of the substrate;forming a second conductive bump on each of the bonding pads of thesemiconductor chip; forming a plurality of spaced apart dielectricsupporting pads on a selected one of the chip-mounting surface of thesubstrate and the pad-mounting surface of the semiconductor chip atpositions offset from the first and second conductive bumps; mountingthe semiconductor chip on the substrate to confine therebetween a gapand to permit each of the first conductive bumps to be verticallyregistered with and to contact a respective one of the second conductivebumps and to permit the supporting pads to interconnect thechip-mounting surface and the pad-mounting surface; reflowing the firstand second conductive bumps in a manner that each of the firstconductive bumps is bonded to the respective one of the secondconductive bumps; and forming an insulating layer that fills in the gapand that encapsulates the supporting pads and the first and secondconductive bumps.
 2. The method of claim 1, wherein the supporting padsare made from a first resin material.
 3. The method of claim 2, whereinthe insulating layer is made from a second resin material.
 4. The methodof claim 3, further comprising a step of curing and hardening thesupporting pads and the insulating layer.
 5. The method of claim 3,wherein the first and second resin materials are epoxy resins.
 6. Themethod of claim 1, wherein the first conductive bumps are formed fromconductive paste.
 7. The method of claim 1, wherein the first conductivebumps are formed from silver-containing conductive paste.
 8. The methodof claim 1, wherein the substrate is selected from a group consisting ofnon-flexible circuit boards, flexible circuit boards, circuit boardsmade from glass materials, and circuit boards made from plasticmaterials.
 9. The method of claim 1, wherein the supporting pads areformed on the chip-mounting surface of the substrate.
 10. The method ofclaim 1, wherein the supporting pads are formed on the pad-mountingsurface of the semiconductor chip.
 11. The method of claim 1, whereinthe second conductive bump is formed by the steps of: applying anadhesive layer to a central area of each of the bonding pads; laying aball body on the adhesive layer, the ball body having a lower half witha lower hemisphere surface that curves upwardly from an upper surface ofthe adhesive layer and that cooperates with the upper surface of theadhesive layer to define a groove therebetween; and forming a conductivelayer that fills the groove, that encapsulates and that is bonded to theball body and the adhesive layer, and that covers a remaining area ofthe respective one of the bonding pads around the central area.
 12. Asemiconductor device comprising: a substrate having a chip-mountingsurface provided with a plurality of contact pads and a plurality offirst conductive bumps formed respectively on said contact pads; asemiconductor chip having a pad-mounting surface provided with aplurality of bonding pads and a plurality of second conductive bumpsformed respectively on said bonding pads, said semiconductor chip beingmounted on said substrate to confine therebetween a gap, said secondconductive bumps being respectively registered with and being bonded tosaid first conductive bumps; a plurality of spaced apart dielectricsupporting pads disposed in said gap at positions offset from said firstand second bumps, said supporting pads interconnecting saidchip-mounting surface of said substrate and said pad-mounting surface ofsaid semiconductor chip; and an insulating layer that fills in said gapand that encapsulates said supporting pads and said first and secondconductive bumps.
 13. The semiconductor device of claim 12, wherein thesupporting pads are made from a first resin material.
 14. Thesemiconductor device of claim 13, wherein the insulating layer is madefrom a second resin material.
 15. The semiconductor device of claim 14,wherein the first and second resin materials are epoxy resins.
 16. Thesemiconductor device of claim 12, wherein the first conductive bumps areformed from conductive paste.
 17. The semiconductor device of claim 12,wherein the first conductive bumps are formed from silver-containingconductive paste.
 18. The semiconductor device of claim 12, wherein thesubstrate is selected from a group consisting of non-flexible circuitboards, flexible circuit boards, circuit boards made from glassmaterials, and circuit boards made from plastic materials.
 19. Thesemiconductor device of claim 12, wherein said second conductive bumpincluding an adhesive layer that covers a central area of a respectiveone of said bonding pads, a ball body that is laid on and that is bondedto said adhesive layer, and a conductive layer that encapsulates andthat is bonded to said ball body and said adhesive layer and that coversa remaining area of the respective one of said bonding pads around saidcentral area, said ball body having a lower half with a lower hemispheresurface that curves upwardly from an upper surface of said adhesivelayer and that cooperates with said upper surface of said adhesive layerto define a groove therebetween, said conductive layer filling saidgroove.
 20. A method for forming a conductive bump on a bonding pad on apad-mounting surface of a semiconductor chip, comprising the steps of:applying an adhesive layer to a central area of the bonding pad; layinga ball body on the adhesive layer, the ball body having a lower halfwith a lower hemisphere surface that curves upwardly from an uppersurface of the adhesive layer and that cooperates with the upper surfaceof the adhesive layer to define a groove therebetween; and forming aconductive layer that fills the groove, that encapsulates and that isbonded to the ball body and the adhesive layer, and that covers aremaining area of the bonding pad around the central area.
 21. Themethod of claim 20, wherein the ball body is formed from anon-conductive material.
 22. The method of claim 20, wherein the ballbody is formed from a conductive material.
 23. The method of claim 20,wherein the adhesive layer is formed from a non-conductive material. 24.The method of claim 20, wherein the adhesive layer is formed from aconductive material.
 25. The method of claim 20, wherein the conductivelayer contains a metal selected from a group consisting of Au, Ag, andSn.
 26. The method of claim 25, wherein the conductive layer is formedby sputtering.
 27. A semiconductor device comprising: a semiconductorchip having a pad-mounting surface provided with at least a bonding pad;and a conductive bump formed on said bonding pad and having an adhesivelayer that covers a central area of said bonding pad, a ball body thatis laid on and that is bonded to said adhesive layer, and a conductivelayer that encapsulates and that is bonded to said ball body and saidadhesive layer and that covers a remaining area of said bonding padaround said central area, said ball body having a lower half with alower hemisphere surface that curves upwardly from an upper surface ofsaid adhesive layer and that cooperates with said upper surface of saidadhesive layer to define a groove therebetween, said conductive layerfilling said groove.
 28. The semiconductor device of claim 27, whereinsaid ball body is formed from a non-conductive material.
 29. Thesemiconductor device of claim 27, wherein said ball body is formed froma conductive material.
 30. The semiconductor device of claim 27, whereinsaid adhesive layer is formed from a non-conductive material.
 31. Thesemiconductor device of claim 27, wherein said adhesive layer is formedfrom a conductive material.
 32. The semiconductor device of claim 27,wherein said conductive layer contains a metal selected from a groupconsisting of Au, Ag, and Sn.